|
adms
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
alliance
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
archimedes
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
bitscope
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
caneda
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
dsview
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
eagle
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
fped
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
fritzing
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
geda
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
gerbv
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
gtkwave
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
kicad
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
librepcb
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
ngspice
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
pcb
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
pulseview
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
qfsm
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
qucs
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
tkgate
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
verilator
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
verilog
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
xcircuit
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
|
xoscope
|
Initial import
|
2026-02-13 17:06:24 +09:00 |
